Since the start of the year, eetimes has been running a series of articles on the challenges that designers must consider when they’re creating embedded systems, which these days are ubiquitous. A they point out, “embedded systems underpin practically every device and system today.” They place those challenges in three categories they consider most critical: connectivity and lower-power design; edge processing; and device security. With my next few posts, I’ll be summarizing what eetimes has to say about each of these areas. With this post, I’ll tee up the series.
In his piece, Majeed Ahmad focuses on the issues that designers are dealing with as they combine embedded processors with analog circuitry – a combination that is enabling a broad range of applications.
Embedded applications are, of course, nothing new, but, as Majeed notes, new challenges are always popping up— “especially when embedded processors designed to work with analog have also evolved over the years to facilitate greater battery efficiency and lower power consumption.”
Drawing on the work of Synaptics’ Dave Gillespie, he describes two analog-embedded challenges.
The first one presented: how to deal with the fact that silicon technology between digital and analog is diverging as manufacturers, aiming for higher performance and lower supply voltages, run up against the constraint that “analog front-end (AFE) circuits often use higher I/O voltages for better dynamic range.”
“Ever smaller feature sizes make digital logic faster and cheaper, but at the same time, they are less and less appropriate for analog circuits,” Gillespie said. “Consequently, sometimes a package that looks like a chip from the outside actually has multiple silicon dice inside.”
There is a solution in which the package combines one part that’s produced through a digital-friendly process – making use of capabilities like digital calibration, which can make up for any aspects of analog processing that are less than ideal – and another circuit that’s built through a process that’s more analog-oriented.
The question then becomes: what goes into the system-on-chip (e.g., signal level, bandwidth) and what more appropriately stays external.
It’s tricky. Mixed-signal and advanced analog designs have been built expressly, from the ground up, to optimize digital performance, and are better suited for some applications rather than others. The industry is coming up with workarounds for this. (One thing about technology: it does have the ability to respond and adapt as needed!)
Beyond the challenge of accommodating analog, there’s the question of deciding on where operations are best performed: special-purpose processors vs analog circuits.
“You need a lot of analog expertise to call this decision properly,” [Gillespie] said. “To do an efficient SoC today, you need deep skill with a wide variety of processing cores, not just with a CPU and its bus architecture.”
And then there’s our old friend DSP to factor in:
“Moreover, at high frequencies, it’s also often necessary to pre-process signals with a dedicated DSP or video codec core right next to the data conversion stage.”
There are a number of other considerations, some specific to the sensor-rich applications that are increasingly on the scene.
Lots going on in the world of embedded processing, much of it thanks to the spectacular growth of IoT devices. There’s no exact measure for the number of IoT devices that are out there. I’ve seen estimates for 2023 of 7 billion IoT devices, and others that place the figure at nearly double that amount. (Just extrapolating from a data point of one – the IoT devices I own – I’d put my money on the higher number.) Growth rate estimates for the next few years also vary. But the commonality among them is that growth is high, and not slowing down anytime soon.
Looking forward to going a little deeper on connectivity and low power, edge computing, and security.